Freescale Semiconductor /MK61F15 /DDR /CR44

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CR44

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0P2TYP 0 (0)WRRLAT 0 (0)WRRSHARE 0WRRERR

WRRLAT=0, WRRSHARE=0

Description

DDR Control Register 44

Fields

P2TYP

Port 2 Type

WRRLAT

WRR Latency

0 (0): Free-running

1 (1): Limited

WRRSHARE

WRR Shared arbitration

0 (0): Port 0 and port 1 are treated independently for arbitration

1 (1): Port 0 and port 1 are grouped together for arbitration

WRRERR

WRR parameters Error

Links

() ()